Circuit boards with multiple Very Large Scale Integrated (VLSI) circuit chips are called Multi-Chip Modules (MCM) The use of VLSI circuits presents interface problems relating to the interconnection of the integrated circuits to other circuits and the placement of the integrated circuits on a ceramic circuit board (MCM-C) As VLSI technology has advanced, the density of circuits on a single VLSI chip has increased and the necessary interconnection for VLSI chips has become increasingly difficult to achieve in a limited space.
In a typical configuration, semiconductor chips are mounted in cavities on multilayer circuit boards or substrates and the substrates accommodate intercircuit connections through tiny vertical holes or vias between the layers. In the case of wirebond chips, the chips are connected to the vias using bonding wires which are welded to the interconnection pads on the chip and the pads connected to the vias on the substrate. The vias are filled with a conductive material, such as molybdenum paste, which creates a connection to the VLSI circuit.
Reworkability is an issue for a wirebond chip which is attached to a substrate. This is generally not an issue for Single Chip Modules (SCMs), where the chip carrier can be thrown away (with the chip) after burn-in and test. For MCMs where only wirebond chips are used, however, reworkability is mandatory to prevent loss of the entire module, even if bare die burn-in has preceded chip attachment.
FIG. 1 shows a typical application using a wirebond chip. In FIG. 1, wirebond chip 10 is mechanically attached to substrate 12 by bonding agent 14. Wirebond chip 10 is electrically connected to substrate 12 by bonding wire 16 at via 18. This prior art application has the disadvantage that removal of wirebond chip 10 from substrate 12 results in loss of the module due to the nature of the removal process, as well as the destruction of the wirebond chip, preventing defect analysis and diagnostics of the chip.
Reworks in high speed MCMs are driven primarily due to speed imbalances among the individual chips on the MCM. This problem is exacerbated with Complementary Metal Oxide Semiconductor (CMOS) technology, where speed sorts of wafer level burn-in carriers are accurate to only within 10-15%. So an MCM designed to run at 100 MHz may not function properly with a microprocessor chip sorted at 90.+-.10 MHz. This has been borne out by recent experiences with MCMs.
In addition to the reworkability issue, high performance micros/Application Specific Integrated Circuit (ASIC) chips require a large amount of decoupling. capacitance (1 to 3 .mu.F). Because a wirebond chip image is significantly larger than an equivalent controlled-collapsed-chip-connection (C4) chip image on an MCM, on module discrete decoupling capacitors do not work as well as capacitors that lie directly beneath the chip. U.S. Pat. No. 5,095,402 issued to Hernandez et al. illustrates a decoupling capacitor placed within an integrated circuit package. As illustrated in FIG. 2, wirebond chip 20 is attached to an IC carrier 22. Bonding wire 26 electrically connects wirebond chip 20 with pads 28 of carrier 22. A decoupling capacitor 24 is attached to wirebond chip 20. This prior art also exhibits the drawback that wirebond chip 20 cannot be removed from carrier 22 without destroying the carrier.
FIG. 3 shows a typical MCM which has nine sites 32 for mounting dice 34, 36, etc. If, for example, die 34 is defective due to an improper wirebond, solder joint, or speed intolerance, the entire MCM 30 must be scrapped because conventional mounting methods of dice 34, 36, etc. do not provide for non-destructive removal of the defective die
FIG. 4 illustrates a conventional method of mounting electronic components 40 to a substrate 42. This conventional method uses solder balls 44 to attach component 40 to substrate 42. This method has a drawback, however, in that decoupling capacitors (not shown) must be attached to substrate 42 at locations remote from component 40. In addition, physical constraints limit the amount of decoupling available to any given component. This results in insufficient decoupling of high frequency noise resulting in inferior high speed performance of the assembled MCM.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide an apparatus and method for enabling the reworkability of an integrated circuit. It is another object of the present invention to enhance the operation of an integrated circuit. It is a further object of the present invention to provide a carrier substrate to attach to a wirebond chip which allows for reworkability of an integrated circuit attached to a multi-chip module. It is another object of the present invention to provide a reworkable multi-chip module with a decoupling capacitor integral with each wirebond chip. Still another object of the present invention is to provide a wirebond chip attached to a substrate which is attached to a multi-chip module using ball grid array (BGA) or controlled collapse chip connection (C4) attachment methods. It is another object of the present invention to provide a burn-in test vehicle capable of operating at speeds of up to 800 MHz. Finally, it is another object of the present invention to allow non-destructive diagnostics of a chip wire bonded to a carrier.